Professor  Kai Liu    

 Male, Doctoral Supervisor, 

 Member of Image and Graph

 Institute of Shannxi province

 Ph.D Degree:

 Computer Systems Organization

 Master Degree:

 Computer Applications Technology

 Department:

 School of Computer Science and 

 Technology

 Address:

 161mailbox, Xidian University,

 Xi’an, China 

 Email:kailiu@mail.xidian.edu.cn

 Office Phone:

 +86-029-88203110

 Office Location:

 Main Building  I-114，II-413

 Science Building B-501

Professor Kai Liu, male, is a doctoral supervisor in Xidian University. He received the honor of the prominent teacher in School of Computer Science and Technology in Xidian University. He holds the membership of Image and Graph Institute of Shannxi province and the membership of Satellite data compression, communication and processing Block Committee of SPIE Optics+Photonics 2011. He serves as the reviewer of Chinese Journal of Computers, Acta Optica Sinica, IEEE Transactions on Very Large Scale Integration Systems, Journal on Communications, Journal of Xidian University (Nature Science) and Journal of Jilin University .

Education:   

B.E. in Software technique of computer, School of Computer Science and Technology in Xidian University,

Xi’an, China, 1999;                     (1995.09~1999.07)

M.E. in Application technique major of computer, School of Computer Science and Technology in Xidian

University, Xi’an, China, 2002;   (1999.09~2002.03)

Ph.D. in Information and communication engineering, School of Telecommunication Engineering in Xidian

University, Xi’an, China, 2005;   (2002.03~2005.12)

Development Experience:

Teaching Assistant, School of Computer Science and Technology, Xidian University.   (2002~2004)

Lecturer, School of Computer Science and Technology, Xidian University.    (2004~2006)

Associate Professor, School of Computer Science and Technology, Xidian University. (2006~2011)

Professor, School of Computer Science and Technology, Xidian University.  (2011~        )

  1.High-speed image video coding algorithms and implementation structure

  2.High-speed coding method based on FPGA

  3.High performance microprocessor architecture and implementation

  4.Research on data representing method and implementation

  2014 Report ppt download:/kailiu/files/20140712_180755.pdf