IEEE期刊论文:(*通讯作者)
Longsheng Wang, Dengquan Li*, Yexin Zhu, Shubin Liu, Ruixue Ding, and Zhangming Zhu, LUT-assisted particle swarm optimization-based bit-weight calibration for SAR ADCs. IEEE Transactions on Instrumentation and Measurement, 2024, 73(2005911):1-11.
Longsheng Wang, Dengquan Li*, Ruixue Ding, and Zhangming Zhu. FAPSO: Fast adaptive particle swarm optimization-based background timing skew calibration for TI-ADCs. IEEE Transactions on Circuits and Systems I: Regular Papers, 2024, 71(9):3975-3985.
Dengquan Li, Tian Feng, Jiale Ding, Yi Shen, Shubin Liu, and Zhangming Zhu, A wideband input buffer based on cascade complementary source follower. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024, 32(5): 962-966.
Dengquan Li, Longsheng Wang, Yi Shen, Shubin Liu, and Zhangming Zhu, A background timing skew calibration for time-interleaved ADCs based on frequency fitness genetic algorithm. IEEE Transactions on Instrumentation and Measurement, 2024, 73(2001110):1-10.
Xin Zhao, Dengquan Li*, Feida Wang, Yi Shen, Shubin Liu, Ruixue Ding, and Zhangming Zhu, An 8-bit 1.5-GS/s voltage-time hybrid two-step ADC with cross-coupled linearized VTC. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, 31(12): 2147-2151.
Dengquan Li, Xin Zhao, Yi Shen, Shubin Liu, and Zhangming Zhu. A 7-bit 3.8-GS/s 2-way time-interleaved 4-bit/cycle SAR ADC 16X time-domain interpolation in 28-nm CMOS. IEEE Transactions on Circuits and Systems I: Regular Papers, 2023, 70(9): 3557-3566.
Xin Zhao, Dengquan Li*, Xianghui Zhang, Shubin Liu, and Zhangming Zhu. A 0.6-V 94-nW 10-bit 200-kS/s single-ended SAR ADC for implantable biosensor applications. IEEE Sensors Journal, 2022, 22(18): 17904-17913.
Dengquan Li, Lei Zhao, Longsheng Wang, Yi Shen, and Zhangming Zhu, A fast convergence second-order compensation for timing skew in time-interleaved ADCs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022, 30(10): 1558-1562.
Maliang Liu, Chenxi Zhang, Shubin Liu, and Dengquan Li*, A 10-bit 2.5-GS/s two-step ADC with selective time-domain quantization in 28-nm CMOS. IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69(3): 1091-1101.
Zhangming Zhu, Yu Zhu, Dengquan Li, and Maliang Liu. A TD-ADC for IR-UWB radars with equivalent sampling technology and 8-GS/s effective sampling rate. IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, 68(3): 888-892.
Dengquan Li, Zhangming Zhu, Jiaxin Liu, Haoyu Zhuang, Yintang Yang, and Nan Sun. A 7-bit 900-MS/s 2-then-3-bit/cycle SAR ADC with background offset calibration. IEEE Journal of Solid-State Circuits, 2020, 55(11): 3051-3063.
Dengquan Li, Maliang Liu, Lei Zhao, Henghui Mao, Ruixue Ding, and Zhangming Zhu, An 8-bit 2.1-mW 350-MS/s SAR ADC with 1.5 b/cycle redundancy in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 2020, 67(11): 2307-2311.
Dengquan Li, Zhangming Zhu, Ruixue Ding, Maliang Liu, Yintang Yang and Nan Sun. A 10-bit 600-MS/s time-interleaved SAR ADC with interpolation-based timing skew calibration. IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66(1): 16-20.
Dengquan Li, Zhangming Zhu, Ruixue Ding, and Yintang Yang. A 1.4-mW 10-bit 150-MS/s SAR ADC with nonbinary split capacitive DAC in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 2018, 65(11): 1524-1528.
会议论文:
Zhangming Zhu, Dongxian Ye, Dengquan Li*, Xin Zhao, Zecheng Zhou, and Ruixue Ding. A 13b 280MS/s partial-interleaving pipelined-SAR ADC with active bias-enhanced ring amplifier and background calibration. IEEE European Solid-State Electronics Research Conference (ESSERC), pp.77-80, Sep. 2024.
Dengquan Li, Yexin Zhu, Longsheng Wang, Shubin Liu, and Zhangming Zhu. Low-cost linearity testing of high-resolution ADCs using segmentation modeling and partial polynomial fitting. IEEE International Symposium on Circuits and Systems (ISCAS), pp.1-4, May 2024.
Yi Shen, Shubin Liu, Yue Cao, Haolin Han, Hongzhi Liang, Zhicheng Dong, Dengquan Li, Ruixue Ding, and Zhangming Zhu. A 12b 1.5GS/s single-channel pipelined SAR ADC with a pipelined residue amplification stage. IEEE Custom Integrated Circuits Conference (CICC), pp.1-4, Apr. 2023.
Tian Feng, Dengquan Li*, Jiale Ding, Shubin Liu, Yi Shen, and Zhangming Zhu. A wideband high-linearity input buffer based on cascade complementary source follower. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), pp. 13-14, Oct. 2022.
Jiaxin Liu, Dengquan Li, Yi Zhong, Xiyuan Tang, and Nan Sun. A 250kHz-BW 93dB-SNDR 4th-order noise-shaping SAR using capacitor stacking and dynamic buffering. IEEE International Solid-State Circuits Conference (ISSCC), pp. 370-371, Feb. 2021.
Dengquan Li, Jiaxin Liu, Haoyu Zhuang, Zhangming Zhu, Yintang Yang, and Nan Sun. A 7b 2.6mW 900MS/s nonbinary 2-then-3b/cycle SAR ADC with background offset calibration. IEEE Custom Integrated Circuits Conference (CICC), pp.1-4, Apr. 2019.
Dengquan Li, Ruixue Ding, Zhangming Zhu, and Yintang Yang. A background timing skew calibration technique in time-interleaved ADCs with second order compensation. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 53-56, Oct. 2018.