论文

2016

[1] R. Xie, J. Cai* and X. Xin, "Simple fault-tolerant method to balance load in network-on-chip," in Electronics Letters, vol. 52, no. 10, pp. 814-816, 5 12 2016. doi: 10.1049/el.2015.3150. SCI 000376136000020.

2017

[1] Rulian Xie, Jueping Cai*, Xin Xin, Bo Yang,"LBFT: a fault-tolerant routing algorithm for load-balancing network-on-chip based on odd–even turn model", Journal of Supercomputing, pp1-22,16 December 2016 (first onine), 2017.DOI: 10.1007/s11227-016-1935-0 SCI  ,EI 20165103155859

[2]Rulian Xie, Jueping Cai*, Xin Xin, Bo Yang,"MCAR: Non-local adaptive Network-on-Chip routing with message propagation of congestion information",Microprocessors and Microsystem,vol.49, pp.117-126,March 2017. SCI 000395598300012, EI 20170103208350

[3]Rulian Xie, Jueping Cai*, Xin Xin, Juan Wang,"Low-cost adaptive and fault-tolerant routing method for 2D Network-on-Chip", IEICE Tansaction on information and System. Vol.E100-D,No.4, pp.910-913, Apr. 2017. SCI 000399371100035, EI 20171703593871

[4] Xin Xin, Jueping Cai*,Ruilian Xie, Peng Wang,"Voltage-mode ultra-low power four quadrant multiplier using subthreshold PMOS Received Date", IEICE Electronics Express, Vol.14(6),pp1-8, 2017.SCI 000401173000007, EI 20171303508582 

[5] Xin Xin, Jueping Cai*, Peng Wang,"Ultra-low Power Comparator with Dynamic Offset Cancellation for SAR ADC", Electronics Letters, Vol.53(24), pp.1572-1574,2017. SCI 000417106200010, EI 20175004539428

[6] Xie Ruilian, Cai Jueping*, Peng Wang ,Xin Zhang , Bo yan," AFRM: Adaptive and Fault-tolerant Routing Method for 2D Network-on-Chip", Journal of Circuits, Systems, and Computers, Vol.26(12).pp.1-23,May,2017. SCI 000406700015, EI  20172303734802

2018

[1] Xin Xin, Cai Jueping*, Xie Ruilian, Wang Peng,"A 750-nW 1-MHz 9-Tap analog finite impluse response filter for wireless sensor network chip", Microelectronics Journal, Vol.71.pp.30-36, Jan, 2018. SCI   ,EI 20174804457900

[2] Xin Xin,Cai Jueping*, Xie Ruilian,"99.83% Switching energy reduction over conventional scheme for SAR ADC without reset energy",Analog Integrated Circuits and Signal Processing,Vol.94(3).pp.519-528, March,2018. SCI  ,EI

 专利

[1] 蔡觉平；凌鹏；齐艺兰；张泽；滕国文；李琰；余军；毕文婷；李赟伟，一种实现高速缓存一致性协议的分层系统及其方法，ZL 2013 1 0385812.8，批准日期2017.04.05.

著作

[1] 蔡觉平 何小川  李逍楠，Verilog HDL数字集成电路设计原理与应用，西安电子科技大学出版社，2011，ISBN 978-7-5606-2652-9。 

     十二五国家级规划教材（2014），陕西省优秀教材（2016）。

[2] 蔡觉平 翁静纯 褚洁 冯必先，Verilog HDL数字集成电路高级程序设计，西安电子科技大学出版社，2015，ISBN 978-7-5606-3858-4。

[3] 蔡觉平 李振荣 何小川  李逍楠  翁静纯，Verilog HDL数字集成电路设计原理与应用（第二版），西安电子科技大学出版社，2016，ISBN 978-7-5606-4110-2/TN。

[4] 蔡觉平  翁静纯 冯必先，《Verilog HDL数字集成电路设计原理与应用（第二版）》学习指导和实验例程，西安电子科技大学出版社，2016，ISBN 978-7-5606-4176-8/TN。